1. Field of the Invention
The present invention relates to an interleaving A/D converter and more particularly to calibrate an interleaving A/D converter that A/D converts by repeatedly operating in parallel a plurality of A/D conversion circuits in a predetermined order.
2. Discussion of the Background Art
The interleaving A/D converter operates a plurality of A/D conversion circuits in parallel in a predetermined order. The gain and offset errors of each A/D conversion circuit and the conversion clock signal skew become noise containing spurious components. For example, when the A/D conversion circuit is constructed from two elements, spurious components appear between the Nyquist frequency and the signal frequency and cause an increase in the noise floor.
By convention, various calibration methods to calibrate the interleaving A/D converter are the offset correction method using the direct current signal as disclosed in Unexamined Japanese Patent Publication No. S61[1986]-53829, the timing calibration method that focuses on the zero crosspoints as disclosed in Unexamined Japanese Patent Publication No. H4[1992]-267,628, and the method in “Digital Background Calibration of a 10b 40M Sample/s Parallel Pipelined ADC,” 1998 IEEE International Solid-State Circuits Conference, pp. 140-141, that corrects the skew error by using random noise as the calibration signal and the sample-and-hold amplifier (SHA) according to D. Fu et al. However, these calibration methods have the following problems.
1) None of the methods can determine the gain, offset, and skew calibration values for each of the plurality of A/D conversion circuits in one try and must combine a plurality of calibration methods. Therefore, the calibration takes time. Preparing the hardware (H/W) required for each calibration method is expensive.
2) In the method by Fu et al., the signal-to-noise ratio (SNR) worsens because the noise in the calibration signal is difficult to effectively cancel. If the SHA is used, problems such as aperture jitter, hold mode distortion, feedthrough, and droop must be solved, and the hardware becomes expensive.
Thus, the method and apparatus for accurately determining the gain, offset, and skew calibration values of each A/D conversion circuit in a few steps are sought for an interleaving A/D converter.